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Personal Data

Username:
estool
Joined:
2010-06-11 04:24:21

Projects

This is a list of open source software projects that estool is associated with:

  • Gen CSRs Control/Status Register (CSR) Generator for FPGA and ASIC Last Updated:
  • PLP Powerfull pre-processor Last Updated:
  • SmGen Verilog Finite State Machine (FSM) Code Generator Last Updated:

Skills

This is a list of skills that estool possesses:

  • C
  • C++

Personal Tools