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Summary: Pull Request resolved: #4495 ## Instructions about RACER Diffs: **This diff was generated by Racer AI agent on behalf of [Junjie Qi](https://www.internalfb.com/profile/view/100004163713284) for T233050949. If the diff quality is poor, consider contacting the user to provide clearer instructions on the task.** - If you are happy with the changes, commandeer it if minor edits are needed. (**we encourage commandeer to get the diff credit**) - If you are not happy with the changes, please comment on the diff with clear actions and send it back to the author. Racer will pick it up and re-generate. - If you really feel the Racer is not helping with this change (alas, some complex changes are hard for AI) feel free to abandon this diff. ## Summary: Removed three unused standard library includes from index_io.h: - `#include <string>` - Not used in the header file - `#include <typeinfo>` - Not used in the header file - `#include <vector>` - Not used in the header file The index_io.h header file contains I/O function declarations for reading/writing Faiss indexes. All function signatures use `const char*`, `FILE*`, and custom Faiss types, with no usage of std::string, std::vector, or typeid. The header only needs `<cstdio>` for FILE type support. This change reduces compilation dependencies and improves build times by removing unnecessary standard library includes. --- > Generated by [RACER](https://www.internalfb.com/wiki/RACER_(Risk-Aware_Code_Editing_and_Refactoring)/), powered by [Confucius](https://www.internalfb.com/wiki/Confucius/Analect/Shared_Analects/Confucius_Code_Assist_(CCA)/) [Session](https://www.internalfb.com/confucius?session_id=c5bf659e-6f30-11f0-80ca-923e70174196&tab=Chat), [Trace](https://www.internalfb.com/confucius?session_id=c5bf659e-6f30-11f0-80ca-923e70174196&tab=Trace) Reviewed By: limqiying Differential Revision: D79400116 fbshipit-source-id: 7af9152b2ec7f1fc600b04600d00fec877ffedec
… index (#4477) Summary: ## Description It appears that this [line](https://github.com/facebookresearch/faiss/blob/main/faiss/gpu/GpuIndexCagra.cu#L540) allocates memory for byte flat vectors and subsequently stores the encoded byte vectors. Unless I’m mistaken, `train_dataset` seems to be a temporary structure that is discarded once index building completes. If that’s the case, I think it would be possible to just write the encoded data directly into train_dataset. This might eliminate the need for an additional memory allocation. ``` // Sample code of directly update in train_dataset[i] // Directly update train_dataset with encoded values for (int64_t i = 0 ; i < n_train * index->d ; ++i) { train_dataset[i] = static_cast<int8_t>( static_cast<uint8_t>(train_dataset[i]) + 128); } // Pass encoded byte vectors to storage index->storage->add_sa_codes( n_train, (uint8_t*) train_dataset, nullptr); ``` This optimization could have a significant impact. For a dataset with 10 million vectors and 768 dimensions, the memory required for flat vectors is approximately 7.15 GB. With the current implementation, this effectively doubles to 14.3 GB due to the additional allocation. (If including memory space for storage, this further goes up to 21.45GB. Pull Request resolved: #4477 Reviewed By: limqiying Differential Revision: D79493876 Pulled By: mnorris11 fbshipit-source-id: dbee9e55b8a63a9269ff05877f37f53cef36491d
Summary: Pull Request resolved: #4437 Reviewed By: trang-nm-nguyen, bshethmeta Differential Revision: D78683814 Pulled By: pankajsingh88 fbshipit-source-id: c51beee5d5dab854f3b9c326d7bb9327c34cb277
Summary: Pull Request resolved: #4504 ## Instructions about RACER Diffs: **This diff was generated by Racer AI agent on behalf of [Junjie Qi](https://www.internalfb.com/profile/view/100004163713284) for T233050949. If the diff quality is poor, consider contacting the user to provide clearer instructions on the task.** - If you are happy with the changes, commandeer it if minor edits are needed. (**we encourage commandeer to get the diff credit**) - If you are not happy with the changes, please comment on the diff with clear actions and send it back to the author. Racer will pick it up and re-generate. - If you really feel the Racer is not helping with this change (alas, some complex changes are hard for AI) feel free to abandon this diff. ## Summary: Removed unused import header `#include <faiss/IndexBinaryFlat.h>` from AutoTune.cpp. This header was included but not actually used in the code, making it an unnecessary sentinel reviewer. --- > Generated by [RACER](https://www.internalfb.com/wiki/RACER_(Risk-Aware_Code_Editing_and_Refactoring)/), powered by [Confucius](https://www.internalfb.com/wiki/Confucius/Analect/Shared_Analects/Confucius_Code_Assist_(CCA)/) [Session](https://www.internalfb.com/confucius?session_id=e79a132f-7163-11f0-bb3e-ae1c19f8ff68&tab=Chat), [Trace](https://www.internalfb.com/confucius?session_id=e79a132f-7163-11f0-bb3e-ae1c19f8ff68&tab=Trace) Reviewed By: limqiying Differential Revision: D79580489 fbshipit-source-id: 4529112e70869928b658172d8411159eea430de4
Summary: Pull Request resolved: #4505 ## Instructions about RACER Diffs: **This diff was generated by Racer AI agent on behalf of [Junjie Qi](https://www.internalfb.com/profile/view/100004163713284) for T233050949. If the diff quality is poor, consider contacting the user to provide clearer instructions on the task.** - If you are happy with the changes, commandeer it if minor edits are needed. (**we encourage commandeer to get the diff credit**) - If you are not happy with the changes, please comment on the diff with clear actions and send it back to the author. Racer will pick it up and re-generate. - If you really feel the Racer is not helping with this change (alas, some complex changes are hard for AI) feel free to abandon this diff. ## Summary: Removed unused import header `#include <faiss/utils/WorkerThread.h>` from IndexIDMap.cpp. This header was included but not actually used in the code, making it an unnecessary sentinel reviewer. --- > Generated by [RACER](https://www.internalfb.com/wiki/RACER_(Risk-Aware_Code_Editing_and_Refactoring)/), powered by [Confucius](https://www.internalfb.com/wiki/Confucius/Analect/Shared_Analects/Confucius_Code_Assist_(CCA)/) [Session](https://www.internalfb.com/confucius?session_id=e79a132f-7163-11f0-bb3e-ae1c19f8ff68&tab=Chat), [Trace](https://www.internalfb.com/confucius?session_id=e79a132f-7163-11f0-bb3e-ae1c19f8ff68&tab=Trace) Reviewed By: limqiying Differential Revision: D79581336 fbshipit-source-id: 685828e160394716e4201e86cca0480f5ef8a15d
Summary: Pull Request resolved: #4506 ## Instructions about RACER Diffs: **This diff was generated by Racer AI agent on behalf of [Junjie Qi](https://www.internalfb.com/profile/view/100004163713284) for T233050949. If the diff quality is poor, consider contacting the user to provide clearer instructions on the task.** - If you are happy with the changes, commandeer it if minor edits are needed. (**we encourage commandeer to get the diff credit**) - If you are not happy with the changes, please comment on the diff with clear actions and send it back to the author. Racer will pick it up and re-generate. - If you really feel the Racer is not helping with this change (alas, some complex changes are hard for AI) feel free to abandon this diff. ## Summary: Removed unused import header `#include <memory>` from IndexBinaryHash.cpp. This header was included but not actually used in the code, making it an unnecessary sentinel reviewer. --- > Generated by [RACER](https://www.internalfb.com/wiki/RACER_(Risk-Aware_Code_Editing_and_Refactoring)/), powered by [Confucius](https://www.internalfb.com/wiki/Confucius/Analect/Shared_Analects/Confucius_Code_Assist_(CCA)/) [Session](https://www.internalfb.com/confucius?session_id=e79a132f-7163-11f0-bb3e-ae1c19f8ff68&tab=Chat), [Trace](https://www.internalfb.com/confucius?session_id=e79a132f-7163-11f0-bb3e-ae1c19f8ff68&tab=Trace) Reviewed By: limqiying Differential Revision: D79581526 fbshipit-source-id: 4c2327432c6716bff5d3cd114fd3080c6bfb7cd3
Summary: Pull Request resolved: #4507 ## Instructions about RACER Diffs: **This diff was generated by Racer AI agent on behalf of [Junjie Qi](https://www.internalfb.com/profile/view/100004163713284) for T233050949. If the diff quality is poor, consider contacting the user to provide clearer instructions on the task.** - If you are happy with the changes, commandeer it if minor edits are needed. (**we encourage commandeer to get the diff credit**) - If you are not happy with the changes, please comment on the diff with clear actions and send it back to the author. Racer will pick it up and re-generate. - If you really feel the Racer is not helping with this change (alas, some complex changes are hard for AI) feel free to abandon this diff. ## Summary: Removed unused import header `#include <algorithm>` from IndexBinaryHNSW.cpp. This header was included but not actually used in the code, making it an unnecessary sentinel reviewer. --- > Generated by [RACER](https://www.internalfb.com/wiki/RACER_(Risk-Aware_Code_Editing_and_Refactoring)/), powered by [Confucius](https://www.internalfb.com/wiki/Confucius/Analect/Shared_Analects/Confucius_Code_Assist_(CCA)/) [Session](https://www.internalfb.com/confucius?session_id=e79a132f-7163-11f0-bb3e-ae1c19f8ff68&tab=Chat), [Trace](https://www.internalfb.com/confucius?session_id=e79a132f-7163-11f0-bb3e-ae1c19f8ff68&tab=Trace) Reviewed By: limqiying Differential Revision: D79582071 fbshipit-source-id: 01d02846d84de9a3ca16955ba6603bf04f43e375
…as been renamed to numpy._core._multiarray_umath (#4501) Summary: Pull Request resolved: #4501 Fix the warning that numpy.core._multiarray_umath is deprecated and has been renamed to numpy._core._multiarray_umath Issue: #4491 Reviewed By: mnorris11 Differential Revision: D79535368 fbshipit-source-id: 0eccf13072d373bec1b3052c689bc85ffd8d4acc
Summary: Pull Request resolved: #4513 ## Instructions about RACER Diffs: **This diff was generated by Racer AI agent on behalf of [Junjie Qi](https://www.internalfb.com/profile/view/100004163713284) for T233050949. If the diff quality is poor, consider contacting the user to provide clearer instructions on the task.** - If you are happy with the changes, commandeer it if minor edits are needed. (**we encourage commandeer to get the diff credit**) - If you are not happy with the changes, please comment on the diff with clear actions and send it back to the author. Racer will pick it up and re-generate. - If you really feel the Racer is not helping with this change (alas, some complex changes are hard for AI) feel free to abandon this diff. ## Summary: This diff removes unused headers from two faiss files: **AutoTune.cpp:** - Removed unused `#include <cmath>` header - Analysis confirmed no mathematical functions (sqrt, pow, ceil, etc.) are used in the file **clone_index.cpp:** - Removed unused `#include <cstdio>` header (no printf/fprintf calls) - Removed unused `#include <cstdlib>` header (no abort/exit/malloc calls) - Kept `#include <faiss/impl/FaissAssert.h>` which is used extensively These changes reduce compilation overhead and dependencies without affecting functionality. --- > Generated by [RACER](https://www.internalfb.com/wiki/RACER_(Risk-Aware_Code_Editing_and_Refactoring)/), powered by [Confucius](https://www.internalfb.com/wiki/Confucius/Analect/Shared_Analects/Confucius_Code_Assist_(CCA)/) [Session](https://www.internalfb.com/confucius?session_id=42df7f2e-7356-11f0-9ffa-ae7e0719de25&tab=Chat), [Trace](https://www.internalfb.com/confucius?session_id=42df7f2e-7356-11f0-9ffa-ae7e0719de25&tab=Trace) Reviewed By: trang-nm-nguyen Differential Revision: D79785715 fbshipit-source-id: 514750d6637cbe1aebb1b5a9985a2494b6143e9a
Summary: Pull Request resolved: #4514 ## Instructions about RACER Diffs: **This diff was generated by Racer AI agent on behalf of [Junjie Qi](https://www.internalfb.com/profile/view/100004163713284) for T233050949. If the diff quality is poor, consider contacting the user to provide clearer instructions on the task.** - If you are happy with the changes, commandeer it if minor edits are needed. (**we encourage commandeer to get the diff credit**) - If you are not happy with the changes, please comment on the diff with clear actions and send it back to the author. Racer will pick it up and re-generate. - If you really feel the Racer is not helping with this change (alas, some complex changes are hard for AI) feel free to abandon this diff. ## Summary: This diff removes two unused headers from `fbcode/faiss/Index2Layer.cpp`: - **Removed `#include <cassert>`**: The file uses `FAISS_THROW_*` macros instead of `assert()` calls - **Removed `#include <cmath>`**: No mathematical functions (sqrt, pow, ceil, floor, etc.) are used in the implementation **Headers kept** (confirmed usage): - `cinttypes`: Used for `PRId64` macro in printf statements - `cstdint`: Used for `int64_t`, `uint8_t` types - `cstdio`: Used for `printf` calls - `immintrin.h`: Used for SSE intrinsics (`__m128`, `_mm_*` functions) - `algorithm`: Used for `std::min` This change reduces compilation overhead and dependencies without affecting functionality. --- > Generated by [RACER](https://www.internalfb.com/wiki/RACER_(Risk-Aware_Code_Editing_and_Refactoring)/), powered by [Confucius](https://www.internalfb.com/wiki/Confucius/Analect/Shared_Analects/Confucius_Code_Assist_(CCA)/) [Session](https://www.internalfb.com/confucius?session_id=42df7f2e-7356-11f0-9ffa-ae7e0719de25&tab=Chat), [Trace](https://www.internalfb.com/confucius?session_id=42df7f2e-7356-11f0-9ffa-ae7e0719de25&tab=Trace) Reviewed By: trang-nm-nguyen Differential Revision: D79785857 fbshipit-source-id: e91928f140ab0e9953980ee36e5b4dc46ca5742f
Summary: The check on the graph degree to ensure that the Binary CAGRA graph is convertible to HNSW is too strict. Instead, an odd degree graph can be converted to HNSW just as well by dropping the farthest edge for each vertex. This is also consistent with regular CAGRA to HNSW conversion. Pull Request resolved: #4516 Reviewed By: junjieqi Differential Revision: D79837285 Pulled By: mnorris11 fbshipit-source-id: 0dca1efa3fbe9d668c0896f1287ed51291b89b01
Summary: Pull Request resolved: #4515 This diff introduces a new file rabitq_simd.h with multiple SIMD-optimized implementations of the dot product calculation using population count (popcnt) operations: 1. AVX-512 implementation with AVX512VPOPCNTDQ: Processes data in 512-bit (64-byte) chunks using dedicated AVX-512 popcnt instructions, with fallbacks to smaller vector sizes for remaining data. 2. AVX-512 fallback implementation without AVX512VPOPCNTDQ: Uses AVX512F instructions with a lookup-based popcount method for 512-bit vectors, falling back to smaller vectors for remaining data. 3. AVX2 implementation: Uses a lookup-based popcount method with 256-bit (32-byte) AVX2 instructions, handling leftovers with 128-bit SSE operations and scalar processing. 4. Scalar fallback: Processes data in 64-bit chunks with builtin popcount operations for systems without SIMD support. Reviewed By: mnorris11 Differential Revision: D79301607 fbshipit-source-id: 4a5277c333ef75aaa14734b59bbe65b986cae025
Summary: Pull Request resolved: #4518 ## Instructions about RACER Diffs: This diff was generated by Racer AI agent for your convenience on top of T233787758. - If you are happy with the changes, commandeer it if minor edits are needed. (**we encourage commandeer to get the diff credit**) - If you are not happy with the changes, please comment on the diff with clear actions and send it back to the author. Racer will pick it up and re-generate. - If you really feel the Racer is not helping with this change (alas, some complex changes are hard for AI) feel free to abandon this diff. ## Summary: Remove unused `#include <cmath>` from IndexPQ.cpp as part of unused header cleanup. The cmath header was included but no math functions (sqrt, log, exp, pow, sin, cos, etc.) are actually used in the implementation. --- > Generated by [RACER](https://www.internalfb.com/wiki/RACER_(Risk-Aware_Code_Editing_and_Refactoring)/), powered by [Confucius](https://www.internalfb.com/wiki/Confucius/Analect/Shared_Analects/Confucius_Code_Assist_(CCA)/) [Session](https://www.internalfb.com/confucius?session_id=8248705b-7428-11f0-9daa-16ec7f673862&tab=Chat), [Trace](https://www.internalfb.com/confucius?session_id=8248705b-7428-11f0-9daa-16ec7f673862&tab=Trace) Reviewed By: mnorris11 Differential Revision: D79790790 fbshipit-source-id: b5c679d50dafa222fe99d7ad167d03eedca51e9b
Summary: Bringing back the `Ex` suffix for extended API for non default data types. Also, removing overrides that were previously added to avoid fragile operator overloading and stop warnings. These overrides that were just forwarding to the base struct function calls are no longer needed with the `Ex` suffix. Will follow up with another PR for type tags for ID types! Pull Request resolved: #4512 Reviewed By: junjieqi Differential Revision: D79932128 Pulled By: mnorris11 fbshipit-source-id: 0827c078ff87d1597264ef5cf80b23f2c2bd596a
Summary: Pull Request resolved: #4522 Prior one: D73595484 Wiki: https://www.internalfb.com/wiki/Vector_Search/Onboarding/Faiss_Contributor/Release/Release_Process/ Reviewed By: junjieqi, subhadeepkaran Differential Revision: D79863512 fbshipit-source-id: cb2af3990551756344d8dfb8af3f2f94c2f6f928
Summary: # Description As fixed in #4516, graph degree can be adjusted when small number of vectors are provided. Therefore, the number of neighbors (precisely, the maximum number of neighbors) can be smaller than graph degree after it was adjusted. This PR is to remove the assertion check that fails if #neighbors not equals to graph degree, which is not always true. Pull Request resolved: #4528 Reviewed By: junjieqi Differential Revision: D80057041 Pulled By: mnorris11 fbshipit-source-id: 128f902fe346cd7c0c4c94664d5d166a5d4c4b16
Summary: There has been a request to change the extended API suffix from `Ex` to `_ex` to match lowercase+underscores used in faiss. Pull Request resolved: #4530 Reviewed By: junjieqi Differential Revision: D80262937 Pulled By: mnorris11 fbshipit-source-id: fa539e4c25d02d68e3b63a83ddfcd526f06a891e
Summary: Pull Request resolved: #4485 hipify.sh currently generates .hip files into a separate directory called `gpu-rocm`. The swigfaiss.swig file expects them there too. But to use internal hipification, it needs to be generated into the same directory `gpu`. That means swigfaiss.swig has to change `gpu-rocm` to just `gpu`, same directory as .cu files. If swigfaiss.swig changes, then the hipify.sh has to change as well, otherwise OSS CI breaks. OSS changes - Requires changing `swigfaiss.swig`, because the internal BUCK approach builds in the same directory as `.cu` files, aka `gpu/`. - Because it builds in same `gpu/` directory, we need to change the OSS side `hipify.sh`. After this diff, it just builds in `gpu/`. The rocm CI still passes. Reviewed By: junjieqi Differential Revision: D79145713 fbshipit-source-id: a83b805c8a7bf286a7e6cff50c8eb2ddd72f518c
Summary: This is a small patch, I understand that you would rather use c++17 as in the rest of the codebase. I am currently in a situation where I need to include c++11 headers, and c++17 headers (faiss). Since this is just a small patch I am hoping you would accept this! However, if you would rather keep using c++17 features in the headers, I can keep this as downstream patch for myself. Pull Request resolved: #4421 Reviewed By: ramilbakhshyiev Differential Revision: D77984626 Pulled By: mnorris11 fbshipit-source-id: bfb2675a44ae554b14f951bd8f9f11e3b4872667
Summary: Pull Request resolved: #4542 resolve: https://fburl.com/quality/vbqrtiu3 Reviewed By: junjieqi Differential Revision: D80682048 fbshipit-source-id: 1fb09e88921009355326c86998769580fd88bd9e
…ns (#4541) Summary: Pull Request resolved: #4541 Per PEP 8 style guide (https://pep8.org/#blank-lines), top-level class definitions should be surrounded by two blank lines. This commit addresses \E302 lint violations across the faiss codebase by ensuring all class definitions have exactly 2 blank lines before them. Changes: - Fixed \E302 errors in 28 Python files across tests, benchmarks, contrib, and GPU modules - Applied consistent PEP 8 formatting for class definitions - No functional changes - formatting only Files affected include test files, benchmark scripts, contrib modules, and GPU test utilities. All changes maintain existing functionality while improving code style compliance. Reviewed By: junjieqi Differential Revision: D80682723 fbshipit-source-id: 6ad5458c3bf1e5c06f35dc8fcdbea2ac4ba83c5f
Summary: Pull Request resolved: #4540 Reviewed By: mnorris11 Differential Revision: D80734549 Pulled By: junjieqi fbshipit-source-id: 0b19e3e6ed05731e7076fb230f45503b36a3faac
Summary: Pull Request resolved: #4543 - Remove unused numpy, os, time, pdb imports from benchmark files - Remove unused array import from test_clustering.py - Remove unused os, tempfile, warnings imports from test_index.py - Remove unused inspect import from class_wrappers.py - Remove unused DatasetSIFT1M, DatasetDeep1B imports from various files - Remove unused IndexFromFactory import from bench_fw_codecs.py - Remove unused re import from parse_bench_all_ivf.py These changes clean up unused imports across the faiss codebase to improve code maintainability and reduce import overhead. Reviewed By: junjieqi Differential Revision: D80682140 fbshipit-source-id: 3a39a720432cd7a4a33065858d0bfa6fcd2d4520
Summary: Pull Request resolved: #4533 ## Instructions about RACER Diffs: This diff was generated by Racer AI agent for your convenience on top of T233787758. - If you are happy with the changes, commandeer it if minor edits are needed. (**we encourage commandeer to get the diff credit**) - If you are not happy with the changes, please comment on the diff with clear actions and send it back to the author. Racer will pick it up and re-generate. - If you really feel the Racer is not helping with this change (alas, some complex changes are hard for AI) feel free to abandon this diff. ## Summary: Remove unused #include directives from AutoTune.cpp to clean up the code: - Remove `<faiss/IndexIVFFlat.h>` (not used in dynamic_cast calls) - Remove `<faiss/MetaIndexes.h>` (not used, IndexIDMap is in separate header) - Add `<faiss/IndexIDMap.h>` (needed for IndexIDMap usage on line 455) This reduces compilation dependencies and improves build times by removing unnecessary header includes. --- > Generated by [RACER](https://www.internalfb.com/wiki/RACER_(Risk-Aware_Code_Editing_and_Refactoring)/), powered by [Confucius](https://www.internalfb.com/wiki/Confucius/Analect/Shared_Analects/Confucius_Code_Assist_(CCA)/) [Session](https://www.internalfb.com/confucius?session_id=8a513fda-79a7-11f0-b9f1-8ac89c030522&tab=Chat), [Trace](https://www.internalfb.com/confucius?session_id=8a513fda-79a7-11f0-b9f1-8ac89c030522&tab=Trace) [Session](https://www.internalfb.com/confucius?session_id=515e5fb6-7d98-11f0-bf56-5b5105c1dc9a&tab=Chat), [Trace](https://www.internalfb.com/confucius?session_id=515e5fb6-7d98-11f0-bf56-5b5105c1dc9a&tab=Trace) Reviewed By: mnorris11 Differential Revision: D80323324 fbshipit-source-id: 7da4535a39d501adcb6727412ab1cba47ded42b8
Summary: Pull Request resolved: #4546 https://github.com/facebookresearch/faiss/actions/runs/17147707531/job/48654701266 nightly is broken likely because {D80682723} accidentally added lines between the method and its decorator D: Reviewed By: juancarpio27 Differential Revision: D80831740 fbshipit-source-id: 40e938dcda538c37da8b2a45fca298d1878bf2ac
…e` warnings in DeviceTensor-inl.cuh (#4545) Summary: Pull Request resolved: #4545 This diff removes redundant `std::move` calls when assigning the result of `res->allocMemoryHandle(...)` to `this->reservation_` in `faiss/gpu/utils/DeviceTensor-inl.cuh`. The compiler warning `-Wpessimizing-move` was triggered because `std::move` was applied to a temporary object, which inhibits copy elision and is unnecessary. Assigning the temporary directly allows the compiler to optimize the move/copy, resolves the warning, and improves code clarity. Reviewed By: zhuhan0 Differential Revision: D80820854 fbshipit-source-id: 73c0e59aae8d30493042808460d37915abe3fc07
Summary: Pull Request resolved: #4547 Reviewed By: trang-nm-nguyen Differential Revision: D80952280 Pulled By: limqiying fbshipit-source-id: f1235c659dbfa32060ec29ccfe23692ebb3b6361
Summary: This PR updates the CMake configuration for the Python extension. The current configuration specifies `Development` python component that includes the unnecessary `Development.Embed` sub-component. For a Python extension, only `Development.Module` component is required. The current configuration leads to a cmake build failure in the `manylinux` environment. https://cmake.org/cmake/help/latest/module/FindPython.html **Additional context** I found this issue while I was testing the `scikit-build-core` backend to build wheel packages in this repository: https://github.com/kyamagu/faiss-build Pull Request resolved: #4549 Reviewed By: junjieqi Differential Revision: D80952883 Pulled By: limqiying fbshipit-source-id: 793bc369fae8e9f1745f91d7f573f77494a1b886
Summary: ### What to fix There is a small bug in the faiss/utils/rabitq_simd.h that some avx512 only supported operation is not guarded by a corresponding macro. As a result, the compile will fail if the arch does not support avx512. ### What I did I add the macro guard. ### What I checked I have compiled locally. This should be an easy fix. Pull Request resolved: #4539 Reviewed By: mnorris11 Differential Revision: D80734590 Pulled By: junjieqi fbshipit-source-id: 603b94f29931576330eee1a8d1dcb73164df47f2
Summary: Pull Request resolved: #4534 ## Instructions about RACER Diffs: This diff was generated by Racer AI agent for your convenience on top of T233787758. - If you are happy with the changes, commandeer it if minor edits are needed. (**we encourage commandeer to get the diff credit**) - If you are not happy with the changes, please comment on the diff with clear actions and send it back to the author. Racer will pick it up and re-generate. - If you really feel the Racer is not helping with this change (alas, some complex changes are hard for AI) feel free to abandon this diff. ## Summary: Remove unused `#include <numeric>` directive from IVFlib.cpp to clean up the code. Analysis confirmed that no functions from the `<numeric>` header (std::accumulate, std::iota, std::adjacent_difference, std::inner_product, std::partial_sum) are used in this file. This reduces compilation dependencies and improves build times by removing unnecessary header includes. --- > Generated by [RACER](https://www.internalfb.com/wiki/RACER_(Risk-Aware_Code_Editing_and_Refactoring)/), powered by [Confucius](https://www.internalfb.com/wiki/Confucius/Analect/Shared_Analects/Confucius_Code_Assist_(CCA)/) [Session](https://www.internalfb.com/confucius?session_id=8a513fda-79a7-11f0-b9f1-8ac89c030522&tab=Chat), [Trace](https://www.internalfb.com/confucius?session_id=8a513fda-79a7-11f0-b9f1-8ac89c030522&tab=Trace) [Session](https://www.internalfb.com/confucius?session_id=515e5fb6-7d98-11f0-bf56-5b5105c1dc9a&tab=Chat), [Trace](https://www.internalfb.com/confucius?session_id=515e5fb6-7d98-11f0-bf56-5b5105c1dc9a&tab=Trace) Reviewed By: mnorris11 Differential Revision: D80324209 fbshipit-source-id: a7e5751590680983ea171ac6514bc4525c94bd07
Summary: Pull Request resolved: #4859 Needed because svs min version is 3.14 which is blocking D95003637 which is blocking Alibek from uncommenting the backward compat Reviewed By: subhadeepkaran Differential Revision: D95087382 fbshipit-source-id: f06c87dd896d2dcbec77e935cf8fb6d321a6a0ab
Summary: The last build pushed to conda-forge was 1.9 in December 2024. Removing the instructions in INSTALL.md for now on using conda-forge to not be misleading. Pull Request resolved: #4843 Reviewed By: mnorris11 Differential Revision: D94739268 Pulled By: gtwang01 fbshipit-source-id: 7740161481f7f0fb3d099ec4bd54f964b009aadf
Summary: This PR will add LeanVec OOD (out-of-distribution) support. Pull Request resolved: #4773 Reviewed By: alibeklfc Differential Revision: D94607022 Pulled By: mnorris11 fbshipit-source-id: df1b023919b6a2753fdddcd7d5490475f8630d36
Summary: need new version to include Python 3.14 change so we can fix the backwards compatibility tests - Increment version to 1.14.1 - Update CHANGELOG.md with 7 commits since v1.14.0 - Bump version in CMakeLists.txt, setup.py, Index.h, INSTALL.md - Fix 6 missing CHANGELOG comparison links (1.12.0–1.14.0) Pull Request resolved: #4861 Test Plan: - [ ] CI passes - [ ] Backward compatibility test uses correct version - [ ] CHANGELOG entries are correctly categorized Reviewed By: junjieqi Differential Revision: D95254574 Pulled By: mnorris11 fbshipit-source-id: c6650fa1783b888c4000e4700da9c8bf01150176
…tQ (#4877) Summary: Pull Request resolved: #4877 Refactor the multi-bit RaBitQ inner product computation from the squared-distance-then-convert approach to a direct dot-product formulation. Before: IP = -0.5 * (||q-c||² + (||r||² - ||x||²) + (-2·||r||/ipnorm)·ex_ip - ||q||²) After: IP = <q,c> + <c,r> + (||r||/ipnorm)·ex_ip Both are mathematically equivalent to <q, x>. The new form is simpler and makes the code structurally immune to the D95166460 bug class where the degenerate case (x ≈ centroid) required complex metric-specific branching that was easy to get wrong. Changes: - Per-document factors (compute_ex_factors): IP branch now computes f_add_ex = <c, r> and f_rescale_ex = ||r||/ipnorm (positive, no -2 factor) - Degenerate case simplified to metric-agnostic f_add_ex=0, f_rescale_ex=0 - Core distance function (compute_full_multibit_distance): accepts a single qr_base parameter instead of qr_to_c_L2sqr + qr_norm_L2sqr, eliminates the -0.5*(dist - qr_norm_L2sqr) IP post-processing - Added q_dot_c field to QueryFactorsData, computed at all query-setup sites - L2 path, 1-bit path, and SIMD kernels are completely unchanged - All four index types covered: IndexRaBitQ, IndexIVFRaBitQ, IndexRaBitQFastScan, IndexIVFRaBitQFastScan Breaking change: serialized multi-bit IP indexes must be re-encoded. L2 indexes are unaffected. Reviewed By: ddrcoder, latham-meta Differential Revision: D95419974 fbshipit-source-id: 3a5a33b5a3065d172a2f57578f3a78bdf562b87c
Summary: Installs [SVS v0.2.0](https://github.com/intel/ScalableVectorSearch/releases/tag/v0.2.0) which includes updates for LeanVec OOD and IVF to be integrated in subsequent PRs. Also removes intel conda channel logic as libsvs-runtime is now available on conda-forge. Pull Request resolved: #4860 Reviewed By: alibeklfc Differential Revision: D95164622 Pulled By: mnorris11 fbshipit-source-id: 3b2bbaa8c5283e6aa5ac5ee250e8eac4ccba0e5a
Summary: Pull Request resolved: #4876 Reviewed By: alibeklfc Differential Revision: D95420200 fbshipit-source-id: b30d0c9c0342460187c3b8dcffbbc3df88f4a11d
Summary: Pull Request resolved: #4855 Reviewed By: zoeyeye Differential Revision: D95003637 fbshipit-source-id: 8def3429aa3890960c5b5b82431ad2878bac5c85
Summary: Pull Request resolved: #4864 FAISS index data structures use C compatible types and thus cannot embed RAII types like std::unique_ptr to trivially ensure exception safety. For this reason, allocations within constructors must be performed within the body of constructors where RAII types and other exception handling tools are available. This diff makes a pass through the index types to clean up the "own_fields" allocation pattern. "own_fields" and the pointer it guards are now both initialized to safe (false/nullptr) values at the definition site and only updated within the constructor body when further exceptions in the constructor are no longer possible. This also fixes a few cases where these fields had indeterminent state or actually wrong state when an exception is thrown. There are a few cases that perform the strange looking operation 'std::make_unique().release()'. This is functionally equivalent to just calling new, but hopefully encourages the continued use of std::unique_ptr should the constructor logic change to introduce vectors for exceptions to be thrown. Reviewed By: mnorris11 Differential Revision: D95294213 fbshipit-source-id: 773d382ed7eedbb81717a15d604f3e2ca33b376b
Summary: Pull Request resolved: #4883 Explicitly verify the results of dynamic_cast and throw desriptive exceptions when the casts fail. Of the 6 sites addressed here, 5 of them are defensive (e.g. against a future code change that breaks a current invariant). The sixth, which casts to IndexPQ*, actually protects against corrupted/mallicious input that embeds an unexpected or malformed index type. Reviewed By: mnorris11 Differential Revision: D95479168 fbshipit-source-id: e74269ce3d18a6a0583e17e32d352f771d437934
Summary: Pull Request resolved: #4866 Templatize all simd wrapper types (simd16uint16, simd32uint8, simd8float32, etc.) on SIMDLevel. This is the foundation for PQ4 fast scan Dynamic Dispatch. Primary templates are declared in simdlib.h. Each platform header provides explicit specializations: - simdlib_avx2.h: simd16uint16<AVX2>, simd32uint8<AVX2>, etc. - simdlib_avx512.h: simd32uint16<AVX512>, simd64uint8<AVX512>, etc. - simdlib_neon.h: simd16uint16<ARM_NEON>, etc. - simdlib_emulated.h: simd16uint16<NONE>, etc. (always included) - simdlib_ppc64.h: simd16uint16<NONE>, etc. (PPC-optimized scalar) SINGLE_SIMD_LEVEL (inline constexpr in simd_levels.h) resolves to NONE in DD mode and to the compiled-in level in static mode. SINGLE_SIMD_LEVEL_256 maps through simd256_level_selector for 256-bit types (AVX512->AVX2, SVE->NEON). Code without explicit SL context uses these. This is migration scaffolding — subsequent diffs will replace SINGLE_SIMD_LEVEL usages with proper SL dispatch. simd_result_handlers.h is no longer %include'd by SWIG (the templatized types are unparseable by SWIG). make_knn_handler methods are %ignore'd. The Python API does not use these internal SIMD handler types. Pre-existing bug fixes bundled with this refactor: - simdlib_avx512.h: simd512bit::bin() stack buffer overflow (char[257] -> char[513]) - simdlib_avx2.h: simd256bit constructor used aligned _mm256_load_si256 instead of unaligned _mm256_loadu_si256 - All platform headers: simd16uint16/simd32uint8 operator+=/operator-= returned by value instead of by reference Static builds: zero performance change. Template specializations produce identical layout, ABI, and codegen as the old plain structs. Reviewed By: mdouze Differential Revision: D95392150 fbshipit-source-id: 435b643f96a7e08d777796390066964d99295f63
Summary: Pull Request resolved: #4884 Templatize fvec_sub, fvec_add, and compute_PQ_dis_tables_dsub2 on SIMDLevel. Move these 256-bit simdlib-based functions from distances_simd.cpp into a new header simd_impl/distances_simdlib256.h, templatized on THE_SIMDLEVEL. Add with_simd_level_256bit() to simd_dispatch.h that maps AVX512->AVX2 and ARM_SVE->ARM_NEON using simd256_level_selector. Dispatch wrappers use with_simd_level_256bit with lambdas. Reviewed By: algoriddle Differential Revision: D95570445 fbshipit-source-id: 557b6546e9526c40a44f7165584e96a9e39a3b89
Summary: Pull Request resolved: #4887 Has to be checked before IVFFlat, otherwise deserialize will give an IVFFlat rather than IVFFlatPanorama. Reviewed By: alibeklfc Differential Revision: D95647196 fbshipit-source-id: fe38144c5276fe85e1206013301f0b159acf1df7
Summary: Pull Request resolved: #4898 - read_binary_hash_invlists(): Protect against negative values that cause out of bounds reads after conversion from int to size_t. - read_binary_hash_invlists() and read_index_binary_up(): Prevent silent corruption of the deserialized index by ensuring BitstringReader::read() has a valid, positive value for nbit. Reviewed By: mnorris11 Differential Revision: D95839908 fbshipit-source-id: 86cfac4b1ff2df8b1834222b8cadebe083539217
#4867) Summary: Pull Request resolved: #4867 Templatize the result handler hierarchy and scaler types on SIMDLevel SL, defaulted to SINGLE_SIMD_LEVEL_256. This allows per-SIMD TUs to instantiate handlers and scalers with explicit SIMD levels (e.g., AVX2) for native dispatch. Result handlers: ResultHandlerCompare, SingleResultHandler, HeapHandler, ReservoirHandler, RangeHandler, PartialRangeHandler — all gain SL parameter. Scalers: DummyScaler templatized on SL. 512-bit methods use SL directly (removing #ifdef __AVX512F__ guard — safe because template bodies only instantiated when called). NormTableScaler stays non-template (public API). FixedStorageHandler: add SL parameter, remove SIMDResultHandler base class (never used polymorphically), remove final/virtual. Pure refactor. All existing callers use defaults and compile unchanged. Reviewed By: mdouze Differential Revision: D95392149 fbshipit-source-id: f4f05332b84d220d9d8e82b08afb4b7219c301a1
Summary: Pull Request resolved: #4868 Move kernel templates from .cpp anonymous namespaces into includable headers, parameterized on SIMDLevel SL. No behavior change — existing .cpp files include the headers and instantiate with defaults. New headers: - kernels_simd256.h: multi-BB kernel (from search_1.cpp) + single-BB QBS 256-bit kernel (from search_qbs.cpp non-AVX512 path) - kernels_simd512.h: AVX512 nq1/nqx kernels + dispatcher (from search_qbs.cpp) - decompose_qbs.h: unified kernel_accumulate_block<NQ, SL> that replaces #ifndef __AVX512F__ with if constexpr on SL, plus QBS decomposition logic Template param order: <int NQ, SIMDLevel SL, class ResultHandler, class Scaler> to enable ergonomic SL propagation via kernel_accumulate_block<Q1, SL>(...). ~900 lines moved (code motion), ~100 lines changed. Pure refactor. Reviewed By: mdouze, mnorris11 Differential Revision: D95392155 fbshipit-source-id: 4020ff66847152aada7271629b05f636f1bc3dc3
Summary: Pull Request resolved: #4899 Add bounds checks when reading index data from untrusted byte streams. Five new FAISS_THROW_IF_NOT_FMT guards reject invalid values early during deserialization: - ProductAdditiveQuantizer: nsplits must be > 0 - ScalarQuantizer: qtype must be within the valid QuantizerType enum range - NSG: R (max out-degree) must be > 0 - IndexPreTransform: VectorTransform chain length must be >= 0 - IndexBinaryMultiHash: nhash must be > 0 Each check includes a descriptive error message with the offending value. Without these checks, invalid data could cause undefined behavior such as zero-size allocations, out-of-range enum casts, or negative loop bounds. Reviewed By: mnorris11 Differential Revision: D95968069 fbshipit-source-id: b9a3e88a01d3427614fa0e027fb233f11ee8cf2e
Summary: Pull Request resolved: #4895 Move IVFRaBitQHeapHandler from a nested class inside IndexIVFRaBitQFastScan to a standalone template in impl/fast_scan/rabitq_result_handler.h. Add SL template parameter for future DD support. A using alias in the index class preserves source compatibility. Pure refactor — no behavior change. Reviewed By: mdouze Differential Revision: D95950482 fbshipit-source-id: 9e5d101e8392e5b0fc53c6f475d4ea46b69ba5ff
Summary: Add OpenMP parallelization to compute_residuals function. This addresses the TODO comment about parallelization. Changes: - Add #pragma omp parallel for to residual computation loop - Use if(n > 1000) to avoid overhead for small batches - Each iteration is independent and thread-safe Pull Request resolved: #4654 Reviewed By: mnorris11 Differential Revision: D86234690 Pulled By: limqiying fbshipit-source-id: 49c5ede2890d52a1d69705a72ada190df299e5d5
Summary: * Summary. This pull request decouples the coarse quantizer from the cuVS index reset logic. It resolves a todo found in the GpuIndexIVFFlat.cu file. * Problem. In the previous implementation, calling reset on a cuVS enabled index would destroy the entire cuvs index object. This action unintentionally wiped out the trained centroids. To compensate for this, a temporary fix was in place within the train function to re-upload centroids if the index was already marked as trained. * Solution. The reset implementation in CuvsIVFFlat.cu has been updated to use the dedicated reset index helper from the cuVS library. This API clears only the inverted lists and leaves the trained centroids untouched. Consequently, the redundant logic and the TODO comment in GpuIndexIVFFlat.cu have been removed. * Testing. The changes were validated using the standard test suite. * Environment: A100 GPU with CUDA 12.6 and cuVS. * Result: 302 tests passed, 0 failed. Pull Request resolved: #4885 Reviewed By: trang-nm-nguyen Differential Revision: D96046499 Pulled By: limqiying fbshipit-source-id: 6fe14007cf2e4dffbd4da21e8120a16f1e84766e
Summary: Pull Request resolved: #4902 When enabled, throw a FAISS exception when index deserialization loops driven by read data fields (nlist, nsplits, VT chain length, nhash, etc.) exceed a configured limit. This can be set by input validation tests to prevent wasting time on pathological, OOM inducting, inputs. Default: 0 (no limit). Reviewed By: mnorris11 Differential Revision: D96016580 fbshipit-source-id: 8a04fdfe5b1d9aecaf1a7156215045be011014e5
Summary: Pull Request resolved: #4907 The sentinels will be used to detect drift between index formats and test coverage. The MetricType enum is handled differently since it is discontiguous. The metric_type_count() method computes the count of enum entries which is likely to change should additional types be added. Reviewed By: mnorris11 Differential Revision: D96032245 fbshipit-source-id: 06acb4f79091a9aafec4a2a3890c94ed43f3da2e
Summary: Pull Request resolved: #4909 ## Problem We recently found **87% of CPU** was being wasted on OpenMP lock contention in `FlatHammingDis::~FlatHammingDis`, not on useful computation. The flame graph breakdown: - 88.2% CPU in `openmp_worker` threads - 87.2% in `FlatHammingDis::~FlatHammingDis` → `__kmpc_critical_with_hint` → `__kmp_acquire_queuing_lock` → `__sched_yield` (84% CPU spinning/yielding on lock) ## Root Cause The `FlatHammingDis` destructor used `#pragma omp critical` to accumulate a single `size_t` counter (`hnsw_stats.ndis += ndis`). Unnamed `#pragma omp critical` sections share a **global serialization lock** — when all OpenMP threads exit the `#pragma omp parallel` block in `IndexBinaryHNSW::search()` simultaneously, they ALL enter the destructor at the same time, serializing on that single lock. With N threads, this means N sequential lock acquisitions where each thread spins/yields waiting for its turn. This is O(N) serialization at the end of every search call. In `IndexBinaryHNSWCagra::search()` with `base_level_only=true`, the situation is even worse: `FlatHammingDis` is created and destroyed **per query iteration** inside `#pragma omp parallel for`, causing `n × num_threads` critical section entries. ## Fix Replace `#pragma omp critical` with `#pragma omp atomic`. Since `hnsw_stats.ndis += ndis` is a simple `size_t` addition, `#pragma omp atomic` compiles to a single hardware atomic instruction (`lock xadd` on x86-64) — orders of magnitude faster than a mutex-based critical section, with effectively zero contention. For reference, the float HNSW path in `IndexHNSW.cpp` already uses the correct pattern: `#pragma omp for reduction(+: n1, n2, ndis, nhops)` with a single-threaded `hnsw_stats.combine()` call outside the parallel region. ## Impact - Eliminates ~87% CPU waste from lock contention in binary HNSW search - Affects all users of `IndexBinaryHNSW::search()` and `IndexBinaryHNSWCagra::search()` - No change to search results or statistics accuracy — `#pragma omp atomic` provides the same correctness guarantees as `#pragma omp critical` for a single `+=` operation Reviewed By: mnorris11 Differential Revision: D95910991 fbshipit-source-id: f14b81b95c7b9f9bd7299a319cc2578fe8af3844
Summary: Pull Request resolved: #4897 Add `FastScanCodeScanner`, a virtual base that bundles handler + kernel behind the SIMD dispatch boundary. In DD mode, `SINGLE_SIMD_LEVEL = NONE` so the existing fast scan code path uses emulated SIMD types. The new scanner provides per-SIMD translation units (AVX2, AVX512, ARM_NEON) compiled with the correct ISA flags, and a factory function (`make_fast_scan_knn_scanner`) that uses `DISPATCH_SIMDLevel` to select the right TU at runtime. This follows the proven `THE_LEVEL_TO_DISPATCH` pattern from the scalar quantizer per-SIMD TUs (`sq-dispatch.h`). Each per-SIMD TU includes `dispatching.h` which provides: - `ScannerMixIn<Handler>`: wraps a concrete handler and calls accumulation kernels (both search_1 multi-BB and QBS paths) - Factory specialization `make_fast_scan_scanner_impl<SL>()` with combinatorial dispatch over `is_max × with_id_map × handler_type` (SingleResultHandler for k=1, HeapHandler for k≤20, ReservoirHandler for k>20) New files: - `impl/fast_scan/dispatching.h` — dispatch template header - `impl/fast_scan/impl-avx2.cpp` — AVX2 per-SIMD TU - `impl/fast_scan/impl-avx512.cpp` — AVX512 per-SIMD TU - `impl/fast_scan/impl-neon.cpp` — ARM NEON TU (with ARM_SVE forwarding) Modified files: - `impl/fast_scan/pq4_fast_scan.h` — FastScanCodeScanner base + factory decl - `impl/fast_scan/pq4_fast_scan.cpp` — NONE specialization + dispatch wrapper - `xplat.bzl` / `CMakeLists.txt` — register SIMD files and header Note: RaBitQ handler is not wired through FastScanCodeScanner in this diff. That comes in later diffs when callers are switched. Reviewed By: mdouze Differential Revision: D95950483 fbshipit-source-id: 03841671f59c0d99de7d0c7408a64e7a8383a8e7
Summary: Pull Request resolved: #4903 Add make_knn_scanner() virtual to IndexFastScan and IndexIVFFastScan that returns a SIMD-dispatched FastScanCodeScanner. Override in RaBitQ classes to produce rabitq-specific scanners via per-SIMD TU factories (rabitq_dispatching.h). Move RaBitQ handler method bodies into headers, add context pointer, and update rabitq_result_handler.h for SL template param. Wire IVFRaBitQFastScanScanner::scan_codes to use the new scanner. Update build files and SWIG ignores. Callers (search_implem_12/14, search_dispatch_implem) are unchanged and still use make_knn_handler. Reviewed By: mdouze Differential Revision: D96116557 fbshipit-source-id: 9ead718ab863f9bc63953c8f9e7958d32ed896f2
…ndler (#4904) Summary: Pull Request resolved: #4904 Now that every make_knn_scanner() returns a real scanner (never nullptr), switch all callers to use scanners directly and remove make_knn_handler. Add impl param to make_knn_scanner and its factory so heap vs reservoir selection respects the implem setting. Switch IndexFastScan search_implem_12/14, IndexIVFFastScan search_dispatch_implem/range_search, and IndexIVFPQFastScan scan_codes to scanner-only paths. Add range scanner factories (make_range_scanner, make_partial_range_scanner). Remove make_knn_handler from all classes. Change search_implem_10/12 scanner param from pointer to reference. Reviewed By: mdouze Differential Revision: D96116555 fbshipit-source-id: 977c24180d67bf90f7c151ac4ca6fe4e2d5e1f92
Summary: Pull Request resolved: #4905 Now that all search paths use FastScanCodeScanner (via dispatching.h), the old pq4_accumulate_loop and pq4_accumulate_loop_qbs free functions have no callers. Delete pq4_fast_scan_search_1.cpp and pq4_fast_scan_search_qbs.cpp entirely. Relocate the remaining utility functions (pq4_qbs_to_nq, pq4_preferred_qbs, accumulate_to_mem) to pq4_fast_scan.cpp. Remove dead declarations from pq4_fast_scan.h. This completes the code deduplication: dispatching.h uses shared helpers from accumulate_loops.h and decompose_qbs.h, and no duplicate implementations remain. Reviewed By: mdouze Differential Revision: D96131176 fbshipit-source-id: e020d7cf405497bbbbbc1698630e228553b851f3
Summary: Pull Request resolved: #4906 The main objective is to move the IVFFlat scanning code inside SIMD compile units, so that the loop over codes runs inside SIMD code. Unfortunately, I could not instant iate all the implementations with with_MetricType, hence the macro to define them. Reviewed By: algoriddle Differential Revision: D95936389 fbshipit-source-id: ae0515fcdcd7c880f329014b264b9dd05065f1c6
…op (#4922) Summary: Pull Request resolved: #4922 MSVC's OpenMP 2.0 implementation requires signed integral loop variables (error C3016). The loop variable in compute_residuals was declared as size_t (unsigned), causing the Windows nightly conda build to fail. Change it to idx_t (int64_t), which is signed and consistent with the rest of the FAISS codebase. See D23234967 for historical precedent. Introduced by D86234690 (PR #4654). Reviewed By: junjieqi Differential Revision: D96355226 fbshipit-source-id: bc84ac927985e4f4aeee345e2e24a9f5fb3b2503
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